Washington, December 24 (ANI): American scientists have made a significant advance towards revolutionising the manufacture of ICs and other microelectronic devices, as they have devised a way to determine whether or not the thin insulating films that play a critical role in high-performance integrated circuits are resistant to fracture. esearchers at the National Institute of Standards and Technology (NIST) say that at issue is the mechanical strength of so-called "low-k" dielectric layers-electrically insulating films only a couple of micrometers thick that are interleaved between layers of conductors and components in microprocessor chips and other high-performance semiconductor devices.
The researchers highlight the fact that brittle fracture failure of low-k insulating films remains a problem for the industry, as it affects both manufacturing yields and device reliability.
They say that a lack of accurate methods to measure the fracture resistance of such films, to date, has obstructed the designing of improved dielectrics.
According to them, a new adaptation of a materials test technique called nanoindentation-which works by pressing a sharp, hard object like a diamond tip and observing how much pressure it takes to deform the material-may be an answer to the measurement problem.
The NIST researchers have revealed that their novel technique requires a slight modification of the nanoindentation equipment-the probe has to have a sharper, more acute point than normally used-and a hefty dose of theory.
Pressing carefully on the dielectric film generates cracks as small as 300 nanometres, which are measured by electron microscopy. Just how the cracks form depends on a complex interaction involving indentation force, film thickness, film stress and the elastic properties of the film and the silicon substrate.
The researchers plug such variables into a new fracture mechanics model that predicts not only the fracture toughness, but also another key value, that is, the critical film thickness for spontaneous fracture.
They believe that this methodology would enable device manufacturers to eliminate some candidate interconnect dielectric films from consideration without further expensive device testing.
This research has been described in a two-part series in the Journal of Materials Research. (ANI)