Cypress launches Rs. 275,000 university design challenge in India

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San Jose, California, Aug 22 (ANI/Business Wire India): Cypress Semiconductor Corp. (NYSE:CY) today announced the PSoC(R) Innovator Design Challenge India, a multi-discipline design contest open to engineering students in India.

Recognizing the growth of engineering talent in India, the Design Challenge will require students to stretch their imaginations to develop novel ways to utilize Cypress's PSoC technology. PSoC, a Programmable System on Chip, allows designers to customize microcontroller chips using visual design software on their PCs.

The winning student or student design team will receive a first place prize of 100,000 Indian rupees, with Rs. 50,000 going to the professor or advisor. The second place finisher will receive Rs. 50,000; the third place finisher will receive Rs. 25,000. Ten runners up will receive Rs. 5,000 each. Students and faculty interested in participating in the contest can find more information at www.psocidcindia.com.

"As future technology leaders, India's engineering students have a lot to gain by working with Cypress's PSoC system-on-chip solution," said Patrick Kane, director of Cypress's University Alliance Program. "And our Design Contest in India shows that Cypress is committed to helping them succeed, "Kane added.

Babak Hedayati, senior vice president of marketing at Cypress, said that contest entrants will gain knowledge of an important tool driving innovation worldwide. "PSoC is everywhere: many mobile phones, laptops, MP3 players, even products like toothbrushes and intelligent shoes are enabled by PSoC. We are pleased to introduce a new generation of designers to PSoC. And we are even more excited to see what they do with it."

All undergraduate and graduate-level engineering students currently enrolled in an accredited university in India are eligible to enter, whether individually or in teams. Each entrant must have a professor or advisor.

Kane said that the contest would be judged by a panel of experts from Cypress and SLS, and the winners announced on March 31, 2009.

Additionally, all winning teams will be interviewed for potential employment at Cypress India and all completed project submissions will be screened for possible publication on the Cypress University Alliance website as a success story, application note or reference design.

PSoC devices employ a highly configurable system-on-chip architecture for embedded control design. PSoC devices integrate configurable analog and digital circuits, controlled by an on-chip microcontroller, providing both enhanced design revision capability and component count savings. They include up to 32 Kbytes of Flash memory, 2 Kbytes of SRAM, an 8x8 multiplier with 32-bit accumulator, power and sleep monitoring circuits, and hardware I2C communications.

The flexible PSoC resources allow designers to future-proof their products by enabling firmware-based changes during design, validation, production, and in the field. The unique PSoC flexibility shortens design cycle time and allows for late-breaking feature enhancements. All PSoC devices are also dynamically reconfigurable, enabling designers to morph internal resources on-the-fly, utilizing fewer components to perform a given task.

ANI

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